Formal Verification of Simulink/Stateflow Diagrams

This book presents a state-of-the-art technique for formal verification of continuous-time Simulink/Stateflow diagrams, featuring an expressive hybrid system modelling language, a powerful specification logic and deduction-based verification approach, and some impressive, realistic case studies.  Readers will learn the HCSP/HHL-based deductive method and the use of corresponding tools for formal v...