Principles of VLSI RTL Design

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Since register transfer level (RTL) design is less about being a bright engineer, and more about knowing the downstream implications of your work, this book explains the impact of design decisions taken that may give rise later in the product lifecycle to issues related to testability, data synchronization across clock domains, synthesizability, power consumption, routability, etc., all which are ...
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Since register transfer level (RTL) design is less about being a bright engineer, and more about knowing the downstream implications of your work, this book explains the impact of design decisions taken that may give rise later in the product lifecycle to issues related to testability, data synchronization across clock domains, synthesizability, power consumption, routability, etc., all which are ...
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  • Formats: pdf
  • ISBN: 9781441992963
  • Publication Date: 4 May 2011
  • Publisher: Springer New York
  • Product language: English
  • Drm Setting: DRM