The Verilog language is a hardware description language which provides a means of specifying a digital system at a wide range of levels of abstraction.
For the near future, the recent predictions and roadmaps of silicon semiconductor technology all agree that the number of transistors on a chip will keep growing exponentially according to Moore's Law, pushing technology towards the system-on-a-chip (SOC) era.
Dictation systems, read-aloud software for the blind, speech control of machinery, geographical information systems with speech input and output, and educational software with `talking head' artificial tutorial agents are already on the market.
Khaled Fazel Stefan Kaiser Digital Microwave Systems German Aerospace Center (DLR) Bosch Telecom GmbH Institute for Communications Technology D-71522 Backnang, Germany D-82234 Wessling, Germany In this last decade of this millennium the technique of multi-carrier transmission for wireless broadband multimedia applications has been receiving wide interests.
system is a complex object containing a significant percentage of elec- A tronics that interacts with the Real World (physical environments, humans, etc.
Cellular Automata Transforms describes a new approach to using the dynamical system, popularly known as cellular automata (CA), as a tool for conducting transforms on data.
This book presents an updated selection of the most representative contributions to the 2nd and 3rd IEEE Workshops on Signal Propagation on Interconnects (SPI) which were held in Travemtinde (Baltic See Side), Germany, May 13-15, 1998, and in Titisee-Neustadt (Black Forest), Germany, May 19-21, 1999.
Appropriate for use as a graduate text or a professional reference, Languages for Digital Embedded Systems is the first detailed, broad survey of hardware and software description languages for embedded system design.
Research on high-level synthesis started over twenty years ago, but lower-level tools were not available to seriously support the insertion of high-level synthesis into the mainstream design methodology.
Field-Programmable Gate Arrays (FPGAs) have emerged as an attractive means of implementing logic circuits, providing instant manufacturing turnaround and negligible prototype costs.
As MOS devices are scaled to meet increasingly demanding circuit specifications, process variations have a greater effect on the reliability of circuit performance.
The ever-increasing miniaturization of digital electronic components is hampering the conventional testing of Printed Circuit Boards (PCBs) by means of bed-of-nails fixtures.
For many years, the dominant fault model in automatic test pattern gen- eration (ATPG) for digital integrated circuits has been the stuck-at fault model.
The quest for higher performance digital systems for applications such as gen- eral purpose computing, signal/image processing, and telecommunications and an increasing cost consciousness have led to a major thrust for high speed VLSI systems implemented in inexpensive and widely available technologies such as CMOS.
Moore's law [Noy77], which predicted that the number of devices in- tegrated on a chip would be doubled every two years, was accurate for a number of years.
The success of VHDL since it has been balloted in 1987 as an IEEE standard may look incomprehensible to the large population of hardware designers, who had never heared of Hardware Description Languages before (for at least 90% of them), as well as to the few hundreds of specialists who had been working on these languages for a long time (25 years for some of them).
This book presents a detailed summary of research on automatic layout of device-level analog circuits that was undertaken in the late 1980s and early 1990s at Carnegie Mellon University.
Physical Design for Multichip Modules collects together a large body of important research work that has been conducted in recent years in the area of Multichip Module (MCM) design.