This book presents the perspective of the SYDIC-Telecom project on system design and reuse as perceived in the course of the research during 1999 - 2003.
LOW power design is playing an important role in today ultra-large scale integration (ULSI) design, particularly as we continue to double the number of transistors on a die every two years and increase the frequency of operation at fairly the same rate.
Oversampled Delta-Sigma Modulators: Analysis, Applications, and Novel Topologies presents theorems and their mathematical proofs for the exact analysis of the quantization noise in delta-sigma modulators.
Jump Time-Delay Systems (JTDS) represent a new class of piece-wise deterministic systems, in which the underlying dynamics is governed by delay-differential equations and it possesses multiple modes of operation depending on the value of an associated Markov random process.
Low-Voltage CMOS Log Companding Analog Design presents in detail state-of-the-art analog circuit techniques for the very low-voltage and low-power design of systems-on-chip in CMOS technologies.
Intellectual Property Protection in VLSI Designs: Theory and Practice provides an overview of the security problems in modern VLSI design with a detailed treatment of our newly developed constraint-based protection paradigm for the protection of VLSI design IPs from FPGA design to standard-cell placement, from high-level synthesis solutions to gate-level netlist place-and-rout, and from advanced CAD tools to physical design algorithms.
High-Frequency Oscillator Design for Integrated Transceivers covers the analysis and design of all high-frequency oscillators required to realize integrated transceivers for wireless and wired applications.
Memory Architecture Exploration for Programmable Embedded Systems addresses efficient exploration of alternative memory architectures, assisted by a "e;compiler-in-the-loop"e; that allows effective matching of the target application to the processor-memory architecture.
Modern System-on-Chip designs are increasingly mixed-signal designs that require efficient systematic design methodologies and supporting computer-aided design (CAD) tools to manage the design complexity in the available design time, that is ever decreasing due to tightening time-to-market constraints.
For four decades the evolution of integrated circuits has followed Moore's law, according to which the number of transistors per square millimeter of silicon doubles every 18 months.
Circuit Design for RF Transceivers covers key building blocks which are needed to make an integrated transceiver for wireless and cellular applications, that is low-noise amplifiers, mixers, voltage controlled oscillators, RF power amplifiers and phase-locked loop systems.
Design of Multi-Bit Delta-Sigma A/D Converters discusses both architecture and circuit design aspects of Delta-Sigma A/D converters, with a special focus on multi-bit implementations.
Boundary-Scan Interconnect Diagnosis explains how to synthesize digital diagnostic sequences for wire interconnects using boundary-scan, and how to assess the quality of those sequences.
As integrated circuit (IC) feature sizes scaled below a quarter of a micron, thereby defining the deep submicron (DSM) era, there began a gradual shift in the impact on performance due to the metal interconnections among the active circuit components.
Analog Design for CMOS VLSI Systems is a comprehensive text that offers a detailed study of the background principles and the analog design techniques for CMOS-VLSI implementation.
Systematic Design for Optimisation of Pipelined ADCs proposes and develops new strategies, methodologies and tools for designing low-power and low-area CMOS pipelined A/D converters.
In 1991 this author published a monograph[l] based on his experience teaching microwave hybrid materials and processing technology at the annual ISHM (now the International Microelectronics and Packaging Society, IMAPS) symposia.
Silicon on insulator (SOI) is a very attractive technology for large volume integrated circuit production and is particularly good for low-voltage, low-power and high-speed digital systems.
In the arena of Parasitic-Aware Design of CMOS RF Circuits, efforts are aimed at the realization of true single-chip radios with few, if any, off-chip components.
System-Level Power Optimization for Wireless Multimedia Communication Power Aware Computing focuses on emerging issues in power aware portable multimedia communications devices beyond low-power electronic design.