Computer architecture and logic design

This books focuses on recent break-throughs in the development of a variety of photonic devices, serving distances ranging from mm to many km, together with their electronic counter-parts, e.

This volume provides a comprehensive state of the art overview of a series of advanced trends and concepts that have recently been proposed in the area of green information technologies engineering as well as of design and development methodologies for models and complex systems architectures and their intelligent components.

This book provides comprehensive coverage of the dependability challenges in today's advanced computing systems.

This book intends to unite studies in different fields related to the development of the relations between logic, law and legal reasoning.

Algorithms play a central role both in the theory and in the practice of computing.

This book focuses on the theoretical and practical aspects of parallel programming systems for today's high performance multi-core processors and discusses the efficient implementation of key algorithms needed to implement parallel programming models.

This book focuses on the theoretical and practical aspects of parallel programming systems for today's high performance multi-core processors and discusses the efficient implementation of key algorithms needed to implement parallel programming models.

Eine hochkomplexe Architektur verbirgt sich auf engstem Raum – dem Prozessor.

Eine hochkomplexe Architektur verbirgt sich auf engstem Raum – dem Prozessor.

This is the revised and extended second edition of the successful basic book on computer arithmetic.

This book introduces readers to emerging persistent memory (PM) technologies that promise the performance of dynamic random-access memory (DRAM) with the durability of traditional storage media, such as hard disks and solid-state drives (SSDs).

This book is intended for designers with experience in traditional (clocked) circuit design, seeking information about asynchronous circuit design, in order to determine if it would be advantageous to adopt asynchronous methodologies in their next design project.

This book provides readers with an overview of the fundamental definitions and features of Multiple-Valued Logic (MVL).

This book constitutes the proceedings of the 18th International Workshop on OpenMP, IWOMP 2022, held in Chattanooga, TN, USA, in September 2022.

This book constitutes the proceedings of the 33rd International Conference on Parallel and Distributed Computing, Euro-Par 2022, held in GLasgow, UK, in August 2022.

This book constitutes the refereed proceedings of the 14th International Conference on Reversible Computation, RC 2022, which was held in Urbino, Italy, during July 5-6, 2021.

This book constitutes the refereed proceedings of the 37th International Conference on High Performance Computing, ISC High Performance 2022, held in Hamburg, Germany, during May 29 - June 2, 2022.

This book constitutes revised selected papers of the 8th Latin American High Performance Computing Conference, CARLA 2021, held in Guadalajara, Mexico, in October 2021.

As the number of cores on a chip continues to climb, architects will need to address both bandwidth and power consumption issues related to the interconnection network.

In this book we give an overview of modeling techniques used to describe computer systems to mathematical optimization tools.

This book provides a structured introduction of the key concepts and techniques that enable in-/near-memory computing.

This book provides a thorough overview of the state-of-the-art field-programmable gate array (FPGA)-based robotic computing accelerator designs and summarizes their adopted optimized techniques.

Artificial intelligence has already enabled pivotal advances in diverse fields, yet its impact on computer architecture has only just begun.

This Synthesis Lecture focuses on techniques for efficient data orchestration within DNN accelerators.

This book provides a structured treatment of the key principles and techniques for enabling efficient processing of deep neural networks (DNNs).

This book targets computer scientists and engineers who are familiar with concepts in classical computer systems but are curious to learn the general architecture of quantum computing systems.

The memory system has the potential to be a hub for future innovation.

This book summarizes the landscape of cache replacement policies for CPU data caches.

With growing interest in computer security and the protection of the code and data which execute on commodity computers, the amount of hardware security features in today's processors has increased significantly over the recent years.

Originally developed to support video games, graphics processor units (GPUs) are now increasingly used for general-purpose (non-graphics) applications ranging from machine learning to mining of cryptographic currencies.

This book provides computer engineers, academic researchers, new graduate students, and seasoned practitioners an end-to-end overview of virtual memory.

Machine learning, and specifically deep learning, has been hugely disruptive in many fields of computer science.

This book targets engineers and researchers familiar with basic computer architecture concepts who are interested in learning about on-chip networks.

Understanding and implementing the brain's computational paradigm is the one true grand challenge facing computer researchers.

This book describes deep learning systems: the algorithms, compilers, and processor components to efficiently train and deploy deep learning models for commercial applications.

This historical survey of parallel processing from 1980 to 2020 is a follow-up to the authors' 1981 Tutorial on Parallel Processing, which covered the state of the art in hardware, programming languages, and applications.

Most emerging applications in imaging and machine learning must perform immense amounts of computation while holding to strict limits on energy and power.

This book focuses on the core question of the necessary architectural support provided by hardware to efficiently run virtual machines, and of the corresponding design of the hypervisors that run them.

An era of big data demands datacenters, which house the computing infrastructure that translates raw data into valuable information.

This synthesis lecture presents the current state-of-the-art in applying low-latency, lossless hardware compression algorithms to cache, memory, and the memory/cache link.

Hardware acceleration in the form of customized datapath and control circuitry tuned to specific applications has gained popularity for its promise to utilize transistors more efficiently.

This book aims to achieve the following goals: (1) to provide a high-level survey of key analytics models and algorithms without going into mathematical details; (2) to analyze the usage patterns of these models; and (3) to discuss opportunities for accelerating analytics workloads using software, hardware, and system approaches.

Since the end of Dennard scaling in the early 2000s, improving the energy efficiency of computation has been the main concern of the research community and industry.

The emerging three-dimensional (3D) chip architectures, with their intrinsic capability of reducing the wire length, promise attractive solutions to reduce the delay of interconnects in future microprocessors.

Having hit power limitations to even more aggressive out-of-order execution in processor cores, many architects in the past decade have turned to single-instruction-multiple-data (SIMD) execution to increase single-threaded performance.

As Moore's Law and Dennard scaling trends have slowed, the challenges of building high-performance computer architectures while maintaining acceptable power efficiency levels have heightened.